I'm confused by these two seemingly contradictory parts 1. "Note that these are dependent on the initial forming conditions used (as discussed above). For completeness we give those conditions as well." 2. "Alternative programming schemes can be used. For example, from our data on the 1T4R test #9 above, one could consider using a fixed reset pulse of WL=3V, SL=3V with a 1000ns pulse to ensure high RESET yields."

The condition is to ensure the device can be resetted. Usually the reram tends to be hard to be resetted