Without having to dig into the PDK, would someone be able to point me to information regarding the physical size of I/O cells for this technology? I am interested in the actual I/O cell and the associated PAD (for staggered and inline) as I would like to do some ball-park estimates for a pad limited design.
Linen is a search-engine friendly community platform. We offer integrations with existing Slack/Discord communities and make those conversations Google-searchable.
