Hello, I'm trying to set the max delay for some path in my design. I'm using commands in the following structure: set_max_delay -from sub_module_inst_name/module_input[0] -to sub_module_inst_name/sub_sub_module_inst_name/module_input[1] 2 However, these delays are not applied to the design. I get errors that say object '----' not found no valid objects specified for -from (same for -to) It seems that I'm not setting the constraints correctly, is the constraint I wrote above written in the correct format for OpenLane? If you have any examples for similar sdc constraints it would be helpful. Thanks

I have no experience setting delays but does

set_max_delay -from sub_module_inst_name.module_input[0] -to sub_module_inst_name.sub_sub_module_inst_name.module_input[1] 2

work?

Thank you. Unfortunately that didn't work either.

have you referrred to OpenSTA document?

Hello, I checked it and saw that there might be some mistakes in my syntax. Using the document I have the following constraint:

set_max_delay -from [get_pins -hierarchical {submodule/wire_name}] -to [get_pins -hierarchical {submodule/subsubmodule/wire_name}] delay_amount_in_ns

But this is giving me the same issue.