anyone completed simulation using gpiov2 pad in design??

@Anshumaan Kumar Yadav you can find the schematics here.

@Mitch Bailey I instantiated the gpiov2 IO pad in my design.v file ( for each input and output port) and do the simulation with gate level netlist, but I didn't get the output.

@Anshumaan Kumar Yadav: Simulating the whole Caravel chip from the top level is probably easier than trying to instantiate gpiov2 pads into your testbench. The gpiov2 pads are very complicated and difficult to set up correctly. On Caravel, there is a complicated control interface between the user project and the GPIO pads. I'm not sure what you're trying to accomplish by placing the pads directly into a simulation.

@Tim Edwards I'm not instantiating gpiov2 in test bench for simulation. But I instantiate in my design.v file for each input and output port. I'm using gpiov2 as input pad and for that reason I'm instantiating in design.v file.