sorry openlane

okay if i removed "FP_pin_order_cfg" , then how am i supposed to pass my pin_order.cfg file ?

[INFO]: Using configuration in 'openlane/pinmux/config.json'... [INFO]: PDK Root: /home/shanu/.volare [INFO]: Process Design Kit: sky130A [INFO]: Standard Cell Library: sky130_fd_sc_hd [INFO]: Optimization Standard Cell Library: sky130_fd_sc_hd [INFO]: Run Directory: /openlane/openlane/pinmux/runs/RUN_2023.08.22_07.28.20 [INFO]: Saving runtime environment... [INFO]: Preparing LEF files for the nom corner... [INFO]: Preparing LEF files for the min corner... [INFO]: Preparing LEF files for the max corner... [INFO]: Running linter (Verilator) (log: openlane/pinmux/runs/RUN_2023.08.22_07.28.20/logs/synthesis/linter.log)... [ERROR]: 7 errors found by linter [ERROR]: Step 0 (verilator_lint_check) failed with error: -code 1 -level 0 -errorcode NONE -errorinfo { while executing "throw_error" (procedure "run_verilator" line 60) invoked from within "run_verilator" (procedure "run_verilator_step" line 3) invoked from within "run_verilator_step"} -errorline 1 [INFO]: Saving current set of views in 'openlane/pinmux/runs/RUN_2023.08.22_07.28.20/results/final'... [INFO]: Generating final set of reports... [INFO]: Created manufacturability report at 'openlane/pinmux/runs/RUN_2023.08.22_07.28.20/reports/manufacturability.rpt'. [INFO]: Created metrics report at 'openlane/pinmux/runs/RUN_2023.08.22_07.28.20/reports/metrics.csv'. [INFO]: Saving runtime environment... [ERROR]: Flow failed.

this is linter.log is showing , but how to fix now ?

i am clueless at this point now

hii vijayan , there is pin placement file that i haven't no idea how they are placed , i am putting these arrangment below as it was mentioned in files . its a pin arrangment of riscdunio https://github.com/dineshannayya/riscduino.

#BUS_SORT #MANUAL_PLACE #N digital_io_oen\[37\] 000 0 2 digital_io_out\[37\] digital_io_in\[37\] digital_io_oen\[36\] digital_io_out\[36\] digital_io_in\[36\] digital_io_oen\[35\] digital_io_out\[35\] digital_io_in\[35\] digital_io_oen\[34\] digital_io_out\[34\] digital_io_in\[34\] digital_io_oen\[33\] digital_io_out\[33\] digital_io_in\[33\] digital_io_oen\[32\] digital_io_out\[32\] digital_io_in\[32\] digital_io_oen\[31\] digital_io_out\[31\] digital_io_in\[31\] digital_io_oen\[30\] digital_io_out\[30\] digital_io_in\[30\] digital_io_oen\[29\] digital_io_out\[29\] digital_io_in\[29\] digital_io_oen\[28\] digital_io_out\[28\] digital_io_in\[28\] digital_io_oen\[27\] digital_io_out\[27\] digital_io_in\[27\] digital_io_oen\[26\] digital_io_out\[26\] digital_io_in\[26\] digital_io_oen\[25\] digital_io_out\[25\] digital_io_in\[25\] digital_io_oen\[24\] digital_io_out\[24\] digital_io_in\[24\] rtc_clk 150 0 2 rtc_intr ir_rx ir_tx ir_intr sm_a1 sm_a2 sm_b1 sm_b2 reg_peri_cs 200 0 2 reg_peri_wr reg_peri_addr\[10\] reg_peri_addr\[9\] reg_peri_addr\[8\] reg_peri_addr\[7\] reg_peri_addr\[6\] reg_peri_addr\[5\] reg_peri_addr\[4\] reg_peri_addr\[3\] reg_peri_addr\[2\] reg_peri_addr\[1\] reg_peri_addr\[0\] reg_peri_be\[3\] reg_peri_be\[2\] reg_peri_be\[1\] reg_peri_be\[0\] reg_peri_wdata\[31\] reg_peri_wdata\[30\] reg_peri_wdata\[29\] reg_peri_wdata\[28\] reg_peri_wdata\[27\] reg_peri_wdata\[26\] reg_peri_wdata\[25\] reg_peri_wdata\[24\] reg_peri_wdata\[23\] reg_peri_wdata\[22\] reg_peri_wdata\[21\] reg_peri_wdata\[20\] reg_peri_wdata\[19\] reg_peri_wdata\[18\] reg_peri_wdata\[17\] reg_peri_wdata\[16\] reg_peri_wdata\[15\] reg_peri_wdata\[14\] reg_peri_wdata\[13\] reg_peri_wdata\[12\] reg_peri_wdata\[11\] reg_peri_wdata\[10\] reg_peri_wdata\[9\] reg_peri_wdata\[8\] reg_peri_wdata\[7\] reg_peri_wdata\[6\] reg_peri_wdata\[5\] reg_peri_wdata\[4\] reg_peri_wdata\[3\] reg_peri_wdata\[2\] reg_peri_wdata\[1\] reg_peri_wdata\[0\] reg_peri_rdata\[31\] reg_peri_rdata\[30\] reg_peri_rdata\[29\] reg_peri_rdata\[28\] reg_peri_rdata\[27\] reg_peri_rdata\[26\] reg_peri_rdata\[25\] reg_peri_rdata\[24\] reg_peri_rdata\[23\] reg_peri_rdata\[22\] reg_peri_rdata\[21\] reg_peri_rdata\[20\] reg_peri_rdata\[19\] reg_peri_rdata\[18\] reg_peri_rdata\[17\] reg_peri_rdata\[16\] reg_peri_rdata\[15\] reg_peri_rdata\[14\] reg_peri_rdata\[13\] reg_peri_rdata\[12\] reg_peri_rdata\[11\] reg_peri_rdata\[10\] reg_peri_rdata\[9\] reg_peri_rdata\[8\] reg_peri_rdata\[7\] reg_peri_rdata\[6\] reg_peri_rdata\[5\] reg_peri_rdata\[4\] reg_peri_rdata\[3\] reg_peri_rdata\[2\] reg_peri_rdata\[1\] reg_peri_rdata\[0\] reg_peri_ack cfg_dco_mode 0300 0 2 cfg_pll_enb pll_ref_clk cfg_pll_fed_div\[4\] cfg_pll_fed_div\[3\] cfg_pll_fed_div\[2\] cfg_pll_fed_div\[1\] cfg_pll_fed_div\[0\] cfg_dc_trim\[25\] cfg_dc_trim\[24\] cfg_dc_trim\[23\] cfg_dc_trim\[22\] cfg_dc_trim\[21\] cfg_dc_trim\[20\] cfg_dc_trim\[19\] cfg_dc_trim\[18\] cfg_dc_trim\[17\] cfg_dc_trim\[16\] cfg_dc_trim\[15\] cfg_dc_trim\[14\] cfg_dc_trim\[13\] cfg_dc_trim\[12\] cfg_dc_trim\[11\] cfg_dc_trim\[10\] cfg_dc_trim\[9\] cfg_dc_trim\[8\] cfg_dc_trim\[7\] cfg_dc_trim\[6\] cfg_dc_trim\[5\] cfg_dc_trim\[4\] cfg_dc_trim\[3\] cfg_dc_trim\[2\] cfg_dc_trim\[1\] cfg_dc_trim\[0\] digital_io_in\[23\] 400 0 digital_io_out\[23\] digital_io_oen\[23\] digital_io_in\[22\] digital_io_out\[22\] digital_io_oen\[22\] digital_io_in\[21\] digital_io_out\[21\] digital_io_oen\[21\] digital_io_in\[20\] digital_io_out\[20\] digital_io_oen\[20\] digital_io_in\[19\] digital_io_out\[19\] digital_io_oen\[19\] digital_io_in\[18\] digital_io_out\[18\] digital_io_oen\[18\] digital_io_in\[17\] digital_io_out\[17\] digital_io_oen\[17\] digital_io_in\[16\] digital_io_out\[16\] digital_io_oen\[16\] digital_io_in\[15\] digital_io_out\[15\] digital_io_oen\[15\] #E sflash_oen\[0\] sflash_oen\[1\] sflash_oen\[2\] sflash_oen\[3\] sflash_ss\[0\] sflash_ss\[1\] sflash_ss\[2\] sflash_ss\[3\] sflash_sck sflash_do\[0\] sflash_do\[1\] sflash_do\[2\] sflash_do\[3\] sflash_di\[0\] sflash_di\[1\] sflash_di\[2\] sflash_di\[3\] digital_io_in\[0\] 0300 0 4 digital_io_out\[0\] digital_io_oen\[0\] digital_io_in\[1\] digital_io_out\[1\] digital_io_oen\[1\] digital_io_in\[2\] digital_io_out\[2\] digital_io_oen\[2\] digital_io_in\[3\] digital_io_out\[3\] digital_io_oen\[3\] digital_io_in\[4\] digital_io_out\[4\] digital_io_oen\[4\] digital_io_in\[5\] digital_io_out\[5\] digital_io_oen\[5\] digital_io_in\[6\] digital_io_out\[6\] digital_io_oen\[6\] digital_io_in\[7\] digital_io_out\[7\] digital_io_oen\[7\] digital_io_in\[8\] digital_io_out\[8\] digital_io_oen\[8\] digital_io_in\[9\] digital_io_out\[9\] digital_io_oen\[9\] digital_io_in\[10\] digital_io_out\[10\] digital_io_oen\[10\] digital_io_in\[11\] digital_io_out\[11\] digital_io_oen\[11\] digital_io_in\[12\] digital_io_out\[12\] digital_io_oen\[12\] digital_io_in\[13\] digital_io_out\[13\] digital_io_oen\[13\] digital_io_in\[14\] digital_io_out\[14\] digital_io_oen\[14\] #S cpu_core_rst_n\[3\] 000 0 2 cpu_core_rst_n\[2\] cpu_core_rst_n\[1\] cpu_core_rst_n\[0\] cpu_intf_rst_n qspim_rst_n sspim_rst_n uart_rst_n\[1\] uart_rst_n\[0\] i2cm_rst_n usb_rst_n cfg_riscv_ctrl\[15\] cfg_riscv_ctrl\[14\] cfg_riscv_ctrl\[13\] cfg_riscv_ctrl\[12\] cfg_riscv_ctrl\[11\] cfg_riscv_ctrl\[10\] cfg_riscv_ctrl\[9\] cfg_riscv_ctrl\[8\] cfg_riscv_ctrl\[7\] cfg_riscv_ctrl\[6\] cfg_riscv_ctrl\[5\] cfg_riscv_ctrl\[4\] cfg_riscv_ctrl\[3\] cfg_riscv_ctrl\[2\] cfg_riscv_ctrl\[1\] cfg_riscv_ctrl\[0\] user_irq\[0\] user_irq\[1\] user_irq\[2\] usb_dp_o usb_dn_o usb_oen usb_dp_i usb_dn_i uart_txd\[1\] uart_rxd\[1\] uart_txd\[0\] uart_rxd\[0\] i2cm_clk_o i2cm_clk_i i2cm_clk_oen i2cm_data_oen i2cm_data_o i2cm_data_i spim_sck spim_ssn\[3\] spim_ssn\[2\] spim_ssn\[1\] spim_ssn\[0\] spim_miso spim_mosi pulse1m_mclk i2cm_intr usb_intr uartm_rxd uartm_txd spis_sck spis_ssn spis_miso spis_mosi user_clock1 0100 0 4 user_clock2 int_pll_clock xtal_clk s_reset_n usb_clk pinmux_debug\[0\] 0300 0 2 pinmux_debug\[1\] pinmux_debug\[2\] pinmux_debug\[3\] pinmux_debug\[4\] pinmux_debug\[5\] pinmux_debug\[6\] pinmux_debug\[7\] pinmux_debug\[8\] pinmux_debug\[9\] pinmux_debug\[10\] pinmux_debug\[11\] pinmux_debug\[12\] pinmux_debug\[13\] pinmux_debug\[14\] pinmux_debug\[15\] pinmux_debug\[16\] pinmux_debug\[17\] pinmux_debug\[18\] pinmux_debug\[19\] pinmux_debug\[20\] pinmux_debug\[21\] pinmux_debug\[22\] pinmux_debug\[23\] pinmux_debug\[24\] pinmux_debug\[25\] pinmux_debug\[26\] pinmux_debug\[27\] pinmux_debug\[28\] pinmux_debug\[29\] pinmux_debug\[30\] pinmux_debug\[31\] cpu_clk #W strap_sticky\[31\] 000 0 2 strap_sticky\[30\] strap_sticky\[29\] strap_sticky\[28\] strap_sticky\[27\] strap_sticky\[26\] strap_sticky\[25\] strap_sticky\[24\] strap_sticky\[23\] strap_sticky\[22\] strap_sticky\[21\] strap_sticky\[20\] strap_sticky\[19\] strap_sticky\[18\] strap_sticky\[17\] strap_sticky\[16\] strap_sticky\[15\] strap_sticky\[14\] strap_sticky\[13\] strap_sticky\[12\] strap_sticky\[11\] strap_sticky\[10\] strap_sticky\[9\] strap_sticky\[8\] strap_sticky\[7\] strap_sticky\[6\] strap_sticky\[5\] strap_sticky\[4\] strap_sticky\[3\] strap_sticky\[2\] strap_sticky\[1\] strap_sticky\[0\] strap_uartm\[1\] strap_uartm\[0\] system_strap\[31\] system_strap\[30\] system_strap\[29\] system_strap\[28\] system_strap\[27\] system_strap\[26\] system_strap\[25\] system_strap\[24\] system_strap\[23\] system_strap\[22\] system_strap\[21\] system_strap\[20\] system_strap\[19\] system_strap\[18\] system_strap\[17\] system_strap\[16\] system_strap\[15\] system_strap\[14\] system_strap\[13\] system_strap\[12\] system_strap\[11\] system_strap\[10\] system_strap\[9\] system_strap\[8\] system_strap\[7\] system_strap\[6\] system_strap\[5\] system_strap\[4\] system_strap\[3\] system_strap\[2\] system_strap\[1\] system_strap\[0\] p_reset_n e_reset_n cfg_strap_pad_ctrl soft_irq 200 0 2 irq_lines\[31\] irq_lines\[30\] irq_lines\[29\] irq_lines\[28\] irq_lines\[27\] irq_lines\[26\] irq_lines\[25\] irq_lines\[24\] irq_lines\[23\] irq_lines\[22\] irq_lines\[21\] irq_lines\[20\] irq_lines\[19\] irq_lines\[18\] irq_lines\[17\] irq_lines\[16\] irq_lines\[15\] irq_lines\[14\] irq_lines\[13\] irq_lines\[12\] irq_lines\[11\] irq_lines\[10\] irq_lines\[9\] irq_lines\[8\] irq_lines\[7\] irq_lines\[6\] irq_lines\[5\] irq_lines\[4\] irq_lines\[3\] irq_lines\[2\] irq_lines\[1\] irq_lines\[0\] cfg_cska_pinmux\[3\] cfg_cska_pinmux\[2\] cfg_cska_pinmux\[1\] cfg_cska_pinmux\[0\] wbd_clk_int wbd_clk_pinmux mclk reg_cs 260 0 2 reg_wr reg_addr\[10\] reg_addr\[9\] reg_addr\[8\] reg_addr\[7\] reg_addr\[6\] reg_addr\[5\] reg_addr\[4\] reg_addr\[3\] reg_addr\[2\] reg_addr\[1\] reg_addr\[0\] reg_be\[3\] reg_be\[2\] reg_be\[1\] reg_be\[0\] reg_wdata\[31\] reg_wdata\[30\] reg_wdata\[29\] reg_wdata\[28\] reg_wdata\[27\] reg_wdata\[26\] reg_wdata\[25\] reg_wdata\[24\] reg_wdata\[23\] reg_wdata\[22\] reg_wdata\[21\] reg_wdata\[20\] reg_wdata\[19\] reg_wdata\[18\] reg_wdata\[17\] reg_wdata\[16\] reg_wdata\[15\] reg_wdata\[14\] reg_wdata\[13\] reg_wdata\[12\] reg_wdata\[11\] reg_wdata\[10\] reg_wdata\[9\] reg_wdata\[8\] reg_wdata\[7\] reg_wdata\[6\] reg_wdata\[5\] reg_wdata\[4\] reg_wdata\[3\] reg_wdata\[2\] reg_wdata\[1\] reg_wdata\[0\] reg_rdata\[31\] reg_rdata\[30\] reg_rdata\[29\] reg_rdata\[28\] reg_rdata\[27\] reg_rdata\[26\] reg_rdata\[25\] reg_rdata\[24\] reg_rdata\[23\] reg_rdata\[22\] reg_rdata\[21\] reg_rdata\[20\] reg_rdata\[19\] reg_rdata\[18\] reg_rdata\[17\] reg_rdata\[16\] reg_rdata\[15\] reg_rdata\[14\] reg_rdata\[13\] reg_rdata\[12\] reg_rdata\[11\] reg_rdata\[10\] reg_rdata\[9\] reg_rdata\[8\] reg_rdata\[7\] reg_rdata\[6\] reg_rdata\[5\] reg_rdata\[4\] reg_rdata\[3\] reg_rdata\[2\] reg_rdata\[1\] reg_rdata\[0\] reg_ack riscv_trst_n 0700 0 2 riscv_tck riscv_tms riscv_tdi riscv_tdo riscv_tdo_en

can u plzz help me

there itself in pinmux folder , there pin_config file

and in which terminal folder do i need to run it exactly