Hi, sorry for the really basic question, when I extract the lvs file, I have this error, what could it be?If anyone knows the possible reasons, please leave a comment! I would appreciate it.
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Luis Henrique Rodovalho
08/10/2023, 8:25 AM
Try ext, then ext2spice, and show us your spice netlist. This way you can be sure that the labels are connected to the transistors.
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Tim Edwards
08/10/2023, 12:34 PM
It's possible that because the label overlaps contacts, that when the circuit is flattened, the label gets disassociated from the metal. If that's the case, then it should be relatively easy to code up a fix for it. And if that's the case, then you can apply a workaround solution by making the labels smaller so that they do not overlap contacts, or else just set the label property to "sticky" using the "setlabel" command.
Tim Edwards
08/10/2023, 12:52 PM
I retract the statement above. I tried it myself and the labels are handled correctly when flattening. So I would have to see the layout file to know what's going on here.
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권미정
08/11/2023, 5:46 AM
@Luis Henrique Rodovalho@Tim Edwards You're welcome! Thank you for your response. After creating a new layout, the extraction worked without any issues. Everything was almost identical except for the A and B ports. Although I'm not sure what the problem was, it seems there might have been a mistake in the previous layout design. I truly appreciate your assistance and attention :)
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