Hi I'm running the post layout simulation (4 sets ...
# xschem
w
Hi I'm running the post layout simulation (4 sets of 4-bits SBox) for 2000 cycles at 12.5 MHz, but the simulation takes very long time to load or no response at all. Can you help me to resolve that problem?
p
If you are doing transient analysis then you can use .tran 1n 200n uic
s
as @PramitKumar Pal said avoid calculating initial operating point by adding UIC to your tran line. To facilitate initial voltages calculation set all inputs to 0V at time 0, expecially supplies, then ramp these up to their right values.
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w
Thank for replying! We are simulating encryption modules (16-bits and 64-bits) to verify the circuit's security. The 16-bit module has 1640 transistors, and the 64-bit module has 6560 transistors. Currently, we run the simulation at 12.5MHz (80ns period), and we need to collect the power number every 1ns for more than 1000 cycles. Additionally, we pause the simulation at the end of each cycle to update the inputs before resuming. We tried using UIC (tran step stop UIC) and set all power supplies to 0, but it still takes over 30 minutes to load the 16-bits module. Is there a better way to improve this?
@Stefan Schippers Could you please give me some suggestions?