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"Default" menu option in Klayout window is not activated. Not able to select GF180MCU option as show...
# klayout
v
"Default" menu option in Klayout window is not activated. Not able to select GF180MCU option as shown in link :

https://www.youtube.com/watch?v=KtegPMeYu2Q&list=PLZuGFJzpFksCU7yKn2P_xRTOktVBDWAJf&index=8&t=191s▾

m
@vks Try to import the gf180mcu technology once. Once you’ve imported it, it should show up the next time you open klayout. 
Manage Technologies
-> right click in white area under default 
Import Technology
Choose 
$PDK_ROOT/$PDK/libs.tech/klayout/tech/gf180mcuC.lyt
v
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screen-capture (2).webm
One more issue faced is that 
gf180mcuC.lyt
file is no longer available inside 
$PDK_ROOT/$PDK/libs.tech/klayout/tech
path when I performed following step to import technology in klayout: 
Manage Technologies
-> right click in white area under default 
Import Technology
Choose 
$PDK_ROOT/$PDK/libs.tech/klayout/tech/gf180mcuC.lyt
m
Looks like 
numpy
is not installed. Does 
pip3 install numpy
work?
v
Both 
numpy
and 
gdsfactory
were not installed. After installing these, Klayout is opening with GF180 library now. Thanks @Mitch Bailey
👍 1
Able to instantiate mos pcells now. Trying to draw inverter layout. But could not find metal via options to connect 2 metals. Are via pcells available in gf180mcu pdk for klayout ? @Mitch Bailey @Amro Tork
a
Yes @vks
v
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a
@Farag Elsayed check this please
@vks Could try “show all cells”
?
f
Via generator is not exist as a separate Pcell in GF180MCU, It is used implicitly in some devices liked FETs.
a
Could we add one?
f
Sure
v
Till then any workaround to add via array in klayout @yrrapt
a
@vks the code exists but we don’t have a GUI interface for it.
v
@Amro Tork Can code be used to generate gds for various via combinations without GUI. If so, even that will be ok to complete layout in klayout with gf180.
a
@vks yes, here is the code. It could generate any via stack from a starting metal layer till end layer. And it fills and centers vias
Here is the code
It could be also found in Efabless version
But we will create a GUI for it.
f
GUI version is already added now in Mabrains repo.
a
Thanks @Farag Elsayed for the quick response
I’ll review before release
@Farag Elsayed Could you please create a few test cases and send screenshots?
f
I will
image.png,image.png
v
Thanks @Amro Tork @Farag Elsayed for via integration. I am using Volare to access gf180 pdk. Will this update be available there.
a
Yes, but it might take a couple of days
f
https://github.com/mabrains/globalfoundries-pdk-libs-gf180mcu_fd_pr/tree/main/cells/klayout/pymacros/cells You just need to replace your pcells with these ones if you need to use it now.
a
You could do this hotfix as @Farag Elsayed suggested
f
You will find it in the following path
Copy code
$PDK_ROOT/$PDK/libs.tech/klayout/pymacros/cells
v
@Farag Elsayed you mean need to replace cells folder inside pymacros with the one in shared repo link ?
f
Files changed are
Copy code
vias_gen.py
via_generator.py
__init__.py
Yes, exactly
Or you could do that for these files only
v
Ok, got it. I will implement it tomorrow and update you.
a
Anytime @vks
👍 1
v
@Amro Tork @Farag Elsayed I am able to successfully instantiate via pcells in klayout. Thanks for your help!
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f
Could you please explain the steps you have used to run DRC ? @vks
v
I copied the *.drc and *.lvs files as in below steps and ran DRC in klayout after refreshing macros. Please see steps in attached video. 
cp -r globalfoundries-pdk-libs-gf180mcu_fd_pr/rules/klayout/drc/*.drc $PDK_ROOT/$PDK/libs.tech/klayout/drc
cp -r globalfoundries-pdk-libs-gf180mcu_fd_pr/rules/klayout/lvs/*.lvs  $PDK_ROOT/$PDK/libs.tech/klayout/lvs
screen-capture (4).webm
f
@vks DRC version in PR repo is out of date, please use one in this repo https://github.com/efabless/globalfoundries-pdk-libs-gf180mcu_fd_pv/tree/main/klayout/drc You could use the 
run_drc.py
script from your terminal as explained in README file.
Also, Drop down menus were implemented for old DRC/LVS versions, it should works with volare without any required changes.
v
I am using gf180 pdk from volare and facing this error in drc run. Should some file from PV repo be copied in gf180 pdk path to use drc from inside klayout GUI ?
f
No, you don't need any files from PV or PR repo if you will use old version. Volare already has all required files for that.
v
You mean I should not have copied any *.drc or *.lvs files as shown in this link ?

https://www.youtube.com/watch?v=UeyEeScHZB0&list=PLZuGFJzpFksCU7yKn2P_xRTOktVBDWAJf&index=10&t=186s▾

How can I redo the updates made in volare pdk ? How can I update volare ?
f
Replace 
$PDK_ROOT/$PDK/libs.tech/klayout
with this one and try to run it again.
klayout.tar.xz
For Pcells, It will be updated soon. I will keep you posted.
v
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f
You could load it from 
File --> Load Layer Properties
and select this file 
$PDK_ROOT/$PDK/libs.tech/klayout/*.lyp
Also, you could add this dir under the following path, this is the full package that have DRC/LVS/Pcells. 
~/.klayout/tech/
Keep in mind that is an old version and may have some issues.
gf180mcuC.tar.xz
v
Last attachment sent contained only a link. Can you please check it again. I believe all these updates will be integrated in next volare update ?
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f
I recommend you to use DRC/LVS from PV repo, it's clean and tested. All steps are documented in README file. Until we have a clean version for volare. https://github.com/efabless/globalfoundries-pdk-libs-gf180mcu_fd_pv/tree/main/klayout
v
Should I replace 
$PDK_ROOT/$PDK/libs.tech/klayout
with 
klayout
folder from PV repo or something else? Can you please specify exactly how to use DRC/LVS from PV repo.
f
v
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f
pip install -r requirements.txt
v
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f
Unfortunately no, PEX could be done via magic
👍 1
v
This message contains interactive elements.
drc.tar.xz
f
You only have tested 
dualgate
table in this run. To run full DRC rule deck, you don't have to use 
--table
option.
python3 run_drc.py --path=/home/vks/tutorial/inv2.gds  --variant=C --run_mode=flat --no_offgrid --run_dir=/home/vks/tutorial/run_drc2
v
Thanks...it is working!
a
@vks I hope everything is working at your end now.
v
Yes @Amro Tork I have been able to run upto lvs for simple inverter in xschem-ngspice-klayout(layout,drc,lvs) flow with lot of help from @Farag Elsayed. Will try to do PEX in magic and check post-layout results.
Can this flow be used to tapeout design for open-mpw? Can you please share some reference for that.
a
@vks Yes, you could use that for MPW. You need to use the analog-MPW not the digital MPW though.
@Mitch Bailey @Tim Edwards Could you please give some guidance here on how to use the analog MPW?
m
From what I’ve seen, analog designs generally have the macros placed and wired manually. There are empty 
user_analog_project_wrapper
layouts in 
caravel/gds
and 
caravel/mag
with the correct pins. Copy one of these files to you local directory, add you macros and routes.
v
@Mitch Bailey Can you please guide what steps need to be followed to onload my analog design (GDS) onto Caravan? I have cloned 
caravel_user_project_analog
. Do in need to prepare 
user_analog_project_exam.v
and 
user_analog_project_wrapper.v
verilog files? I have no experience with verilog.
m
@vks For analog designs, you do not need to prepare any verilog files. The minimum you need is 
gds/user_analog_project_wrapper.gds
. I recommend also creating a spice file with a tool such as xschem so that you can run LVS.
v
@Mitch Bailey What would be next step after adding my final gds to 
gds/user_analog_project_wrapper.gds
. How will user gds here get integrated into Carvan at top level and how will connection to IO pads be made ? I am following readme from Caravan repo https://github.com/efabless/caravel_user_project_analog/blob/main/docs/source/index.rst But its not clear which of the following steps need to be followed or skipped. 
Building the PDK
Running Full Chip Simulation
Analog Design Flow
Running Open-MPW Precheck Locally
Running transistor level LVS
m
I’d definitely run the precheck LVS. PDK was already built with 
make setup
. Full chip simulation will probably take a lot of work.
v
@Mitch Bailey Volare pdk is alread installed. Still need to run 
make setup
to build PDK ?
m
Sorry for the confusion. You asked if you could skip thee 
Building the PDK
step. I replied that the pdk was built when you ran 
make setup
after cloning the repo, so yes, you can skip this step.
👍 1
j
@Farag Elsayed Hi, i have this error, you know how can I fix it?
I copied the drc and lvs files from the global foundry repository and I have this error, apparently klayout still has many errors and little support
f
@Juan Andres I believe you have used an old version for DRC rule deck, could you please send it to take a look ?
j
Well, I downloaded the ones that are in the repository. PV, but the lvs have an error too
the drc was fixed but the lvs throws an error that had already been published here
IMG_1870.png
and I downloaded them today from the PV repository
f
Did you try to run it from terminal or just GUI ?
j
GUI is in klayout ?
f
Yes
j
Only klayout
f
I will check
j
Another question, do you know what happens with the macros? have many DRC errors
IMG_1869.jpg
f
It seems offgrid violations, could you check which rule cause these errors ?
j
uff there are 75 violations
also makes an error with the bulk and the guard ring
there are errors due to the metal 1 that is good, it is easy to fix, but there is an error from the contact to the poly, something from the diffusions, there are many
I was working with an old version that was the one that gave me the drc error that I sent just now, but that macro only had an error with the bulk, and I downloaded the latest from the repositories and worse errors
f
Any of them are false errors ? if yes, please give me an example
j
Ok let me a second
No, for example of poly and contact is 0.15 distance
And it has 0.14
IMG_1871.jpg
f
But this is a real violation. Min space is 0.15um
j
Yes
that means they are not fake violation
f
This is an issue in layout not in rule deck.
j
and this also happens with the pmos
but that's from the default macro
f
Ah you mean Pcells
j
Yes
IMG_1872.jpg
f
Yes, Pcells have many DRC erros, It has not been verified or fixed, and unfortunately work on it has now stopped.
j
I was working with a version that only had bugs in the bundle, do you know what it is? when I updated to the last one I lost which one it was
Do you know how I could fix the distances of these macros myself? since they are small distances that can be easily fixed
f
Old version has been implemented using Klayout, but we have replaced it with new one implemented using GDsfactory which has a lot of errors, we were planning to roll back the old version but we stopped on this. You could use it from old volare/open_pdks version. You could fix it manually after flatting the cell itself and use partial option as an example to relax constrains you have.
j
What do you mean by flatten? A version before or what version would it be?
f
Related to LVS, you have to use it from terminal then you could view result using GUI as the current version is not supported for GUI due to using 
include
in the main runset. Check REAMDE for how to run it https://github.com/efabless/globalfoundries-pdk-libs-gf180mcu_fd_pv/blob/main/klayout/lvs/README.md
j
but let's say that if I wanted to fix the macro, (I like the changes you made, this opens up many possibilities in layout techniques), which files should I check?
f
Right click on the cell you have and select 
Flatten cell
, this will allow you to modify the cell with DRC errors.
j
but this will damage the parameterization right?
IMG_1875.jpg
f
Fixing the generator itself may be out of your scope, no it will not damage anything.
j
but it won't let me, I get this error
f
image.png
How did you get this error ?
j
IMG_1876.jpg
f
Use it for 
TOP
cell
j
Yea and now?
IMG_1877.jpg
f
Just ok, then fix DRC errors you have if you need to do that manually.
j
but wait one question, lets say i fix one, can this go back to normal to modify the parameters?
that is, after putting fingers
f
No, this will need to fix generator itself.
j
What files could I look at to repair the generator?
of course because a transistor is not a problem, but if it is a big design ufff
f
All cells could be found in 
$PDK_ROOT/$PDK/f180mcuC/libs.tech/klayout/pymacros/cells_gf
j
I downloaded the pr repository, I get these
IMG_1878.jpg
f
Same, depend on how you have installed macros
j
Is fet.py?
f
Yes
& it calls 
draw_fet.py
which constructs the cell
j
Do you know if I should do some special saving? It is that it modifies but I do not see the changes
f
Did you install GF using volare ?
j
Yes, but I'm saving it in .klayout, there I saved the repository
f
Then you will need to modify cells in your 
.klayout
path.
j
I am modifying the two .py but I do not see changes when there should be
f
After opening Klayout, you will have something like this in your terminal, you need to modify macros in these paths.
j
IMG_1880.jpg
f
1st one
j
Is necessary close and open klayout for apply changes ?
f
Yes
j
you know it is “OFF GRID: OFF GRID vertex on comp”
IMG_1882.jpg
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