Hi all I am stuck with the lvs error

Subcircuit summary:
Circuit 1: x6_bit_dac                      |Circuit 2: 6_bit_dac                       
-------------------------------------------|-------------------------------------------
sky130_fd_pr__nfet_g5v0d10v5 (120)         |sky130_fd_pr__nfet_g5v0d10v5 (120)         
sky130_fd_pr__pfet_g5v0d10v5 (120)         |sky130_fd_pr__pfet_g5v0d10v5 (120)         
switch2n_3v3 (16)                          |switch2n_3v3 (16)                          
Number of devices: 256                     |Number of devices: 256                     
Number of nets: 163 **Mismatch**           |Number of nets: 162 **Mismatch**           
---------------------------------------------------------------------------------------
NET mismatches: Class fragments follow (with fanout counts):
Circuit 1: x6_bit_dac                      |Circuit 2: 6_bit_dac

How do I find where is the extra net coming from in the layout ? I double checked the 6_bit_dac layout and upto 5bit_dac everything was lvs clean. I have attached the comp.out file, and both the netlist for layout and schematic along with the screenshot for the schematic. Thank you.

In the netlist,

VCC

is connected to all the cells

(no matching net)                          |Net: VCC                                   
                                           |  sky130_fd_pr__pfet_g5v0d10v5/(1|3) = 60  
                                           |  sky130_fd_pr__pfet_g5v0d10v5/4 = 120     
                                           |  switch2n_3v3/VCC = 16                    
---------------------------------------------------------------------------------------

while in the layout it is split into 2 nets that are not connected at the top level.

Net: x5_bit_dac:5_bit_dac_0[1]/VCC         |(no matching net)                          
  sky130_fd_pr__pfet_g5v0d10v5/(1|3) = 30  |                                           
  sky130_fd_pr__pfet_g5v0d10v5/4 = 60      |                                           
  switch2n_3v3/VCC = 8                     |                                           
                                           |                                           
Net: x5_bit_dac:5_bit_dac_0[0]/VCC         |(no matching net)                          
  sky130_fd_pr__pfet_g5v0d10v5/(1|3) = 30  |                                           
  sky130_fd_pr__pfet_g5v0d10v5/4 = 60      |                                           
  switch2n_3v3/VCC = 8                     |

Check the layout top level

VCC

connections.

Ok let me check