Is there SRAM that are functional for SkyWater 130, Does OpenRam generate SRAMs that are proved to be working on silicon?

The 2 port srams in the pdk pass LVS and I’ve heard that at least one is working at least partially. I’ve seen LVS errors in openram generated macros, but there might be some that are ok. https://github.com/d-m-bailey/extra_be_checks/discussions/27#discussioncomment-5904780

I can confirm we used a

sram_1rw1r_32_256_8_sky130

in our FPGA on MPW2 and it works as expected

The SRAM blocks have been proven functionally. They will not operate to the specified frequency of 100MHz. They work fine at the 10MHz clock on the board and probably operate at the maximum specified frequency of our management SoC, which is 40MHz. I would not trust it to run reliably above that.