Hi everyone, do anyone have experience in solving max fanout violation using openlane? your help is much precious🙏

You could try to decrease

SYNTH_MAX_FANOUT

in your configuration file.

How does a decrease of ``SYNTH_MAX_FANOUT`` have a positive effect on a 49>10 scenario ? I have a few fanout=13 limit=10 to resolve myself somewhere. Doesn't the flow automatically insert buffers to achieve fanout ? What if I create that buf/clkbuf tree manually (that was to be my next experiment). Top google hit on this configuration item indicates cranking it all the way up to 15 has previously caused crash or halt with flow.

Yosys calls abc for tech mapping in the synthesis phase, which uses some combination of buffering, resizing and duplication to keep fanout under

SYNTH_MAX_FANOUT

if

SYNTH_BUFFERING

is enabled (which is the default). The fanout is modified by later phases in the flow, so it won't necessarily stay under this value, but the flag still provides some control over it.

hi htamas, this is the sta i get from routing .odb file, is that also can using yosys to doing buffer insert inside the .odb or openroad?

I am understanding this to mean,

SYNTH_MAX_FANOUT

is being used by an early flow step, but later steps will keep on rearranging things without regard to this, so the warning at the end it to show of how out of hand those later stages needed to insert elements compared to targets

hi Darryl Miles, ya i understand regarding this, is there anyway for solving the max fanout on the later stage？so far i got to know in openroad with cmd "repair_design -max" to limit the wire length and insert buffer, but in here, timing violation will be a great number.

Check the resizer.log and if fanout number is high, create an issue_reproducible and file a github issue

thanks from helping i will put on discussion on this matter on github