Hello, is there an easy way to disable the code blocks? for example if I have a block of spice code to run a parameterised sweep but want to disable it while I use a different analysis? I don't want to delete it or go through and comment out all the lines if I can help it
s
Stefan Schippers
05/11/2023, 9:39 AM
yes, add an attribute spice_ignore=true:
p
ParkedTom
05/11/2023, 9:39 AM
Great thanks!
👍 1
s
Stefan Schippers
05/11/2023, 7:02 PM
@ParkedTom Driven by user requests recently I added a convenient shortcut to disable circuit elements. The shortcut does nothing more than adding the
spice_ignore=true
attribute (or
verilog_ignore=true
or
vhdl_ignore=true
depending on current netlisting mode). You can select multiple objects and block-disable them. Applying the menu command again re-enables the components. Another change, now disabled elements are drawn in grey. I think this will visually help. Elements that are disabled for spice netlist are not automatically disabled for VHDL or verilog, unless you disable them for these netlist formats too.
Linen is a search-engine friendly community platform. We offer integrations with existing Slack/Discord communities and make those conversations Google-searchable.