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<@U016EM8L91B> is there a way to hook up multiple VSSA pads to the same ground (same PSUB on chip) w...
# analog-design
j
@Tim Edwards is there a way to hook up multiple VSSA pads to the same ground (same PSUB on chip) without LVS throwing a fit?
l
You must insert a metal resistor between the nets. This way you can short them. You can make them by selecting rmetal layers.
j
@Luis Henrique Rodovalho thanks for the help. Just to clarify, what does this look like in layout? I don't imagine I should be doing anything in layout to actually short the nets together. When you say "rmetal layers", does this mean I have to somehow connect two VSSA pads with this "rmetal" layer in layout. Thanks in advance.
l
You're only replacing a piece of the metal track with an resistor. A RC extracted netlist would contain those resistors between the pads, anyway. In commercial software, it is used a alias, which in the end will be placed in the layout as a tiny resistor to separate the nets.
t
@Jon Ho: The trick is to use the 
isosub
layer in magic. That will define a ground region that does not connect electrically to the rest of the substrate.
I think I am interpreting your question correctly. You are connecting, e.g., 
vssa1
and 
vssa2
into your circuit, but LVS complains that they are all shorted together (and presumably also shorted to 
vssd
, which I think is the default substrate). The two choices are to put 
isosub
under all areas with devices connected to the same net, or to put a deep nwell structure under all devices connected to the same net. If you really want them isolated, then the deep nwell structure is preferred.
j
Thank you guys for the help!
@Tim Edwards do I have to use VSSD?
Currently, I’m only taking advantage of VSSA1 and VSSA2 for my ground pins since they’re the closest pins to my design on the chip.
t
You don't use vssd at all but LVS at the top level thinks everything has vssd as the substrate, including the whole user project area. I'm still trying to work out issues related to that. It's not an easy problem to solve and keep the user project area flexible.
m
@Tim Edwards would a 
subcut
box around the entire 
user_project_wrapper
block at the 
caravel_core
level work? I wonder how 
user_project_wrapper
blocks with multiple substrate connections and multiple internal 
subcut
layers would work in that case.
t
@Mitch Bailey: They wouldn't, which is why I'm still thinking about it. The best I've come up with is to put a substrate cut under the user project if and only if the user project has no deep nwell or substrate cut areas itself. But maybe there's a better solution.
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