It is a super interesting tech and lowered NRE by reducing the set of masks that need to be purchased and processed for customization.(It still needed all masks for volume manufacturing) . It is a very good approach for medium volume sale of custom logic asic. FPGAs were cheaper to develop but more expensive to MFG due to the overhead of implmenting logic in LUT vs Gate arrays. ASICs are more expensive to develop and cheaper to manufacture with RTL implementation in STD cells. MPWs and Chipignites are both cheaper to develop (free tools and less IP to develop) and cheaper to manufacture (smaller die area) than the gate array for the vast majority of users. (They do take longer in fab for the initial devices. Since they run all layers rather than only the metal masks.) Might be worth a white paper discussing the available options and their advantages and disadvantages for various user purposes.