@Tim Edwards I was trying to run top level post extraction of my two stage amplifier placed in the caravan pad ring. When we used the wrapper symbol provided, we got weird results, when looking at the post extraction and when looking at just the schematic. We decided to remove the pad ring and preserve the distancing on our routing and the individual pads that we connected to and we got the results we expected (they closely matched our pre-layout simulation results). The first image is the schematic capture testing through the symbol, the second is the post extraction netlist and the third is the post extraction from when we did not use the wrapper symbol. I'm wondering why the plots seemed to be very weird on the first two photos compared to the last. Are we messing up somewhere in the post-extraction? We are using the updated/fixed wrapper spice file that you provided us in the past (the one with the fixed port ordering). Thanks in advance. The 4_22_23_Fingers_PostEx constains the schematic files of which analog_wrapper_tb.sch and ota_no_mirror_testing_031823_symbol. That file and folder was used for the whole pad ring. The folder 4_22_23_Fingers_PostEx_no_wrapper contains in its schematic folder the No_wrapper_tb schematic which uses the user_analog_project_wrapper symbol which is different than the given module, I just didn't rename it.

Hi Thomas, when you simulated your OpAmp without the PadRing, make sure you add an RC output load on your OpAmp to mimic the parasitic capacitance and resistance of the ESD structure. Also, a good approximation of the parasitic capacitance of a minimum width PC board trace is approximately 10pF / 2.5cm of length of trace.