Q.> Hi all ! might be a simple question. I have 2 clock domain of same frequency but may be out of phase so when we try to send a signal from domain A to domain B , may lead to metastability. Design a simple architecture which ensure a pulse launched from Domain A is captured correctly to domain B by eliminating metastable condition ? ..... Please Help !

use two flip flops in destination clock domain "Multi-flop Synchronizer" in https://www.maven-silicon.com/blog/clock-domain-crossing/

Thnx for sharing.... @Arman Avetisyan