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# general
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Shirsendu Acharyya

04/18/2023, 5:00 PM
Q.> Hi all ! might be a simple question. I have 2 clock domain of same frequency but may be out of phase so when we try to send a signal from domain A to domain B , may lead to metastability. Design a simple architecture which ensure a pulse launched from Domain A is captured correctly to domain B by eliminating metastable condition ? ..... Please Help !
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Arman Avetisyan

04/18/2023, 6:49 PM
use two flip flops in destination clock domain "Multi-flop Synchronizer" in https://www.maven-silicon.com/blog/clock-domain-crossing/
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Shirsendu Acharyya

04/21/2023, 3:21 PM
Thnx for sharing.... @Arman Avetisyan
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