@Stanley Lin: Please note that the

reg_mprj_datal/h

registers are driven by a state machine in the housekeeping module and are programmed in four passes (one per byte). That means that its maximum rate is going to be something below 1MHz (I forget how many clock cycles are in the state machine; I'd need to look it up). If you try to drive the GPIO faster than that from the management SoC, the behavior will be a much slower pulse, since the housekeeping will hold the wishbone acknowledge until it has finished the write cycle.

Ah I see. Thank you @Tim Edwards. Now I understand that's why I see a lower response. However, if I want to control the chip with a series of input, and each input is one cycle. How can I feed the signal to the GPIO? Since I obviously cannot feed the input like below example

reg_mprj_datal = 0x100
delay(1)
reg_mprj_datal = 0x300
delay(1)
reg_mprj_datal = 0x500

@Stanley Lin is that a problem to mask before setting it?