hello,
I have been trying to harden a risc-v core ...
# generala
apothem
04/03/2023, 12:44 AMhello,
I have been trying to harden a risc-v core for nearly over a week now but i just cannot get rid of the high congestion issue, even if i use 40mm^2 die area (which is huge since i only have 4kb cache and one 32bit in-order core) it still gives this same error. I don't know what to do now, any ideas will be appreciated!
m
Mitch Bailey
04/03/2023, 1:34 AM@apothem Do you have 4 or 5 hard macros?
Mitch Bailey
04/03/2023, 1:59 AMLooks like your in-order core might be too close to the cache on the left. Maybe you could try centering it between the caches.
a
apothem
04/03/2023, 1:59 AMonly 4 (two for labels and two for data)
apothem
04/03/2023, 2:00 AMshould i harden the core to center it or is there any constraint that i can use to let the tool place the cells centered
v
Vijayan Krishnan
04/03/2023, 2:13 AMShare the issue_reproducible as zip file
a
apothem
04/03/2023, 2:35 AMissue_reproducible.zip
a
Arman Avetisyan
04/03/2023, 5:17 AMideas to try:
Try smaller area with around 30-50-70 utilization (use relative size)
Idea 2: Put macros closer or it might not be able to route the design
v
Vijayan Krishnan
04/03/2023, 5:43 AM@apothem
Not able to read attached odb file>
Copy code
openroad> read_db tmp/cts/12-wrapper_islemci.resized.odb
read failed on database stream (unexpected end-of-file encounted).
while evaluating read_db tmp/cts/12-wrapper_islemci.resized.odba
apothem
04/03/2023, 11:04 AMI am using the latest commit from OpenLane repo
v
Vijayan Krishnan
04/03/2023, 11:05 AMAre you using fixed macro location?
a
apothem
04/03/2023, 11:06 AMyes, i am using placement config for them otherwise it forces them to be in the corners
v
Vijayan Krishnan
04/03/2023, 11:07 AMBut is that causing any congestion issue?
a
apothem
04/03/2023, 11:08 AMyeah i think so unfortuneatly, that's why i'm trying to use manual placement
v
Vijayan Krishnan
04/03/2023, 11:08 AMIt should not happen. Can you share your design files as zip?
Vijayan Krishnan
04/03/2023, 11:09 AMAlso can you file github issue here https://github.com/The-OpenROAD-Project/OpenLane/issues
a
apothem
04/03/2023, 11:12 AMi don't know if you meant that with "design" but since it is not a public project for now i can't share the .v files,
v
Vijayan Krishnan
04/03/2023, 11:15 AMwithout test case it's difficult resolve the issue. Try with different density/core size/ cell padding/ macro place halo/ auto macro placement such different configuration to resolve congestion issue.
a
apothem
04/03/2023, 11:17 AMthank you so much, i've already tried a lot of density - core size configurations but never tried cell padding or macro place halo
a
Arman Avetisyan
04/03/2023, 2:40 PMlow density can cause the same issues
Arman Avetisyan
04/03/2023, 2:41 PMtry smaller floorplan and smaller spacings between macros
a
apothem
04/03/2023, 10:00 PMokay, i will give it a try, thank you!
m
Matt Liberty
04/04/2023, 3:29 AMPadding is probably the easiest way to spread things out - you have lots of extra space
v
Vijayan Krishnan
04/04/2023, 3:45 AMThe problem is with openlane by default 0 cell padding set. So user have to update that.
a
apothem
04/04/2023, 2:41 PMi've tried smaller floorplan with smaller spacing and changing default cell padding but nothing seems to change unfortunately, i will try to harden other submodules and try hierarchical design instead :(
apothem
04/05/2023, 9:11 PMsince i couldn't find any solution to this problem, i have tried to harden the submodules to get rid of the congestion but created lef files seems really different than the normal lef files, can you please help me identifty what the problem is?
apothem
04/05/2023, 9:23 PMactually i just realized that even OpenLane's example designs (mem1r1w and regfile_2r1w) don't generate lef files as expected from the documentation, is it because the installation?
5 Views