Hello, is it necessary to use the mpw-7a tag for this tapeout? My macro hardening fails on the openlane version for mpw-7a but it runs ok with the latest openlane image (updated 2 days ago), alongwith with the updated open_pdks. As long as our repo has a Makefile with the openlane tag and open_pdks commit versions used, can we proceed with tapeout? The DRC error here is “DRC errors: Min area of metal1 holes > 0.14um^2 (met1.7)“, and from looking around it seemed that updating openlane was the fix (which did work, this error is not seen anymore)

Hello , where is the activity tab of my Request’? @jeffdi

We have submitted our tapeout like this: does that mean we have done everything?

@jeffdi I have submitted my project successfully and I can't find the request or activity tap, could you help please?

Hello all we passed the precheck half an hour ago and the project is in tape out phase. It is now at step 5 of 7 for the last 20 minutes. How long does it take to finish? Sorry for the last minute question

I'm getting a strange tapeout job error. I have a fairly a large design integrated into the user_analog_project_wrapper. All precheck and tapout checks pass except for the "Klayout Metal Minimum Clear Area Density". The logs show the following layer densities. It's my understanding that these densities represent the % of empty area on each layer. The numbers are significantly smaller than they should be just based on a quick visual inspection (I'm not using even half the available area per layer), and some of the results are even negative which doesn't make sense. Attempting to run the magic metal density check python script returns an error saying the design is less than 700 x 700 um, which is not the case. Could this be an error in error in the tapeout check?

Excuse me. I have some problem with the re submission of MPW7. When I do step 2, to run chip-level static timing analysis for your project integrated in updated Caravel design, I follow this documentation. It will do make install again then "make install_mcw". But I will clone the branch of mpw-8a.

Does that matters?

I have a similar problem with re-submission of MPW7. In order to run new timing analysis, the Makefile re-installed new versions of OpenLane. I then completed mpw_precheck and tapeout and everything succeeded. However, the CI scripts ran a day later and throws errors that the version of OpenLane installed does not match the one tested, and suggested a "make pdk". I am halfway through this, but then realized that this new OpenLane install will probably force me to rebuild my project all over again. Does this make my project now look like a new project and thus does not meet the terms of original submission date, and thus miss the lottery for MPW7 acceptance? What should I do now? It does seem that the CI script is doing the test on user_proj_example, not my project, so do I just update OpenLane and not re-run my project (this will get past the error, but it does seem like a silly rule to get around for timing re-submission testing)?

Hello All, we have our latest version of the online tapeout in the Efabless platform failing, and would like to revert to a previous version which passed the tapeout for submission, is this possible? or do I need to run the previous version precheck+tapeout again? cc @Tim Edwards @jeffdi @Mitch Bailey

Hello All, we have a problem with resubmission of out MPW-7 tapeout. It passes precheck, but fails density checks in tapeout job AFTER Caravel integration and metall fill. Density values reported by tapeout klayout_met_density.log are on the screenshot. It looks like metal fill scripts "overfilled" M2 & M5 a bit. Is there a workaround which could be applied to our GDS to mitigate this issue or nothing can be done without metal fill scripts changes?

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Hi all , anyone have idea how to deal with this problem as tape out is failed while checking@Mitch Bailey @jeffdi @Tim Edwards any ideas? fom_density_fail.png

Something weird happened to my post-tapeout GDS: the metal fill seems to go out of bound but somehow still passes the tapeout check. I don't think this is the expected behaviour and I can't find what causes it:

Expected:

Erroneous:

Both of them passes the tapeout check

Can I get a clear Idea on what's going on for tapeout run?? I have tried every possible solutions that I got from different resources but my tapeout is failing again and again.. my precheck is all passed: Precheck Id: 03c6e668-01c4-4e5b-b1be-841e58aa9852 Also I don't get the point why there is difference between logs in my jobs for same precheck run ( Warning : 183 shift/reduce conflicts) and the log file saved in galaxy desktop( NO warnings saved here) ?? my tapeout is failing: Tapeout id: 92fbac3a-4dd9-4842-a7bf-d42447e12500

@Mitch Bailey Sir I didn't compress user_project_wrapper.gds file.. I was using this repo with my colleague.. https://github.com/komalg27/matrix_multiply_mpw8.git registered on efabless. Tried with other efabless account and github credentials. New repo https://github.com/radhe-2022/mpw8_trail.git still tapeout is failing with same reason

Has anyone seen this on recent tapeout jobs? This is for a chipignite project, the most recent one 2306Q. Apparently analog support is paused until the tapeout version is updated. Any ETA on that?

[05/09/23 08:48:53 PDT] FAILED
STDOUT: {{Project Local Info}} submission.tar.gz
STDOUT: {{Tapeout Failed}} This version of tapeout does not support analog projects, please try again later.

@Indira Iyer has left the channel

Hai all, Is there any public template available (other than a Caravel project template) in eFabless? If yes, kindly share with me the details. Advance thanks.

Hai all, For our design, I am facing an issue in the xor check using Open Lane. Kindly share with me your ideas. Herewith, I have attached the file for your kind reference. Advance thanks.

@Mohammed Fayiz Ferosh has left the channel

hello all, we are getting a fail status in out tapeout job, but can't find the message that indicates what's the actual error (all the steps seem to succeed in the main log), is there anyone facing this issue? I'm attachiing the log files, any help would be really appreciated

Hi all, on my tapeout job, I am failing for Field Oxide Metal (FOM) Density:

STDOUT: {{Step Update}} Executing Check 6 of 6: Klayout Field Oxide Mask Density on [caravel_2311ea22.oas]
STDERR: [ WARN ] FOM Density Check Result: 'caravel_2311ea22.oas' has 147 DRC violations.

It looks like we are under density for our FOM in all cases, if I am reading the log correctly"

fom density below 0.33 : 1713/2730 is 0.3268 for tile ((1820,1610;2520,2310)), area = 490000

I saw this thread where @jeffdi explained "_typically issues with being under on Li are due to using too many or all fill cells in a design vs decap. too high Li is usually due to using decap only. One solution is to use the modified EF decap size 12 cell which has a balanced Li and diffusion. This will address issues with Li density as well as FOM density (tap+diffusion)."_ In that discussion, he suggested adding the following to the

config.tcl

file:

set ::env(DECAP_CELL) "\
	sky130_fd_sc_hd__decap_3 \
	sky130_fd_sc_hd__decap_4 \
	sky130_fd_sc_hd__decap_6 \
	sky130_fd_sc_hd__decap_8 \
	sky130_ef_sc_hd__decap_12"

I'm looking to do the equivalent in my

config.json

file, but I have 2 questions: 1. Since my density is consistently under, not under/over as in the example discussion, is this decap cell still a good choice for my problem? 2. I do not see the

DECAP_CELL

config documented for the

config.json

, is how can I adjust this (or FOM in any way) with the current Openlane Flow?

@Mitch Bailey, we are getting the OEB error for digital inputs and output, please see the screenshot. We have tried the user_defines.v settings you adviced here: https://open-source-silicon.slack.com/archives/C02096M650E/p1694936784747689?thread_ts=1681286955.054969&cid=C02096M650E However, we still get the failed state. What do we EXACTLY need to do to void this for both digital input and output using GPIO? Thx in advance! cc @Mario Romero @Alfonso Cortés

Hello, we got a weird error message when trying to run the precheck on Efabless platform:

[11/06/23 18:17:11 PST] SUBMITTED
            [11/06/23 18:21:27 PST] STARTED
            [11/06/23 18:21:45 PST] EXCEPTION
                Script error code: 1

Would you please help us to debug this? I have no clue of what is happening. The project is here: https:/repositories.efabless.com/duyhieubui/UNIC-CASS-IC4.git

Dear efabless teams, Our team has tried to submit our shuttle to the AI Generated Challlenge. I saw on the web that the guide you guys uploaded on the YouTube link takes about 15 to 20 minutes ( ). But it's taken us an hour and 30 minutes just for the precheck and we're not done yet (step 9/12). Could this be due to the server being slow? I'm worried we won't be able to finish in time to meet the deadline. Could you guys check the server for us? Is there a way for us to submit on time, or is it possible for us to submit late, or can we submit without doing the precheck, please?