Tim 'mithro' Ansell
Ahmed Ghazy
11/11/2020, 9:30 PMTim 'mithro' Ansell
drr
11/11/2020, 11:59 PMdev
branch isn't tech dependent and will come up for sky130 builds too: I am trying out OpenRAM just to get a feel for it and using the verilog sim models in my tests, which seem tech independent. Using the demo RAM config with minor tweaks (still scn4m_subm
):
# Data word size
word_size = 8
# Number of words in the memory
num_words = 1024
num_rw_ports = 1
num_r_ports = 0
num_w_ports = 0
num_banks = 1
..produces errors such as this but only for particular num_words
. Changing it from 1024 to 512 for example "fixes" this.
power_leak = spice["nand4_leakage"]
KeyError: 'nand4_leakage'
Is this an issue that I'd see in sky130 builds or is it a tech specific issue I can disregard?jrsharp
11/12/2020, 2:37 AMjrsharp
11/12/2020, 2:44 AMMatthew Guthaus
11/12/2020, 3:27 AMjrsharp
11/12/2020, 3:28 AMMatthew Guthaus
11/12/2020, 3:28 AMMatthew Guthaus
11/12/2020, 3:28 AMjrsharp
11/12/2020, 3:29 AMMatthew Guthaus
11/12/2020, 3:29 AMjrsharp
11/12/2020, 3:29 AMMatthew Guthaus
11/12/2020, 3:30 AMMatthew Guthaus
11/12/2020, 3:30 AMElkim Roa
11/12/2020, 3:31 AMjrsharp
11/12/2020, 4:02 AMMatthew Guthaus
11/12/2020, 4:12 AMjrsharp
11/12/2020, 4:13 AMjrsharp
11/12/2020, 5:07 AMjrsharp
11/12/2020, 6:15 AMRiking28
11/12/2020, 11:54 AMjrsharp
11/12/2020, 10:23 PMMatthew Guthaus
11/12/2020, 10:25 PMjrsharp
11/12/2020, 10:26 PMMatthew Guthaus
11/12/2020, 10:26 PMjrsharp
11/12/2020, 10:27 PMMatthew Guthaus
11/12/2020, 10:28 PMMatthew Guthaus
11/12/2020, 10:28 PMRiking28
11/12/2020, 11:07 PM