Channels

#openhighqualityresonators

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Art Scott

05/09/2022, 5:02 PMset the channel description: Discussion High-Quality Resonators Quality-factor > 1. - a
Art Scott

05/09/2022, 5:08 PMset the channel topic: Discussion High-Quality Resonators Quality-factor > 1. - a
Art Scott

05/09/2022, 5:20 PMThe Integrated circuit**Metric**for Energy efficiency, TIME, Quality Factor (Q):**ratio**of dynamic energy used per cycle to energy dissipated per cycle. - a
Art Scott

05/09/2022, 5:25 PMCurrent ICT Quality-factor = 1 - t
Tim Edwards

05/09/2022, 7:06 PM**@Tim Edwards**has left the channel - a
Art Scott

06/05/2022, 2:04 PMhttps://ieeexplore.ieee.org/document/5235943 http://nazrulanuar.com/author/wp-content/uploads/2011/12/2721.pdf B. Razavi, "The Active Inductor [A Circuit for All Seasons]," in IEEE Solid-State Circuits Magazine, vol. 12, no. 2, pp. 7-11, Spring 2020, doi: 10.1109/MSSC.2020.2987500. https://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=9123639 - a
Art Scott

07/23/2022, 3:41 AMY. Takahashi, N. Anuar, S. Nagano, T. Sekine and M. Yokoyama, "On chip LC resonator circuit using an active inductor for adiabatic logic," 2009 52nd IEEE International Midwest Symposium on Circuits and Systems, 2009, pp. 1171-1174, doi: 10.1109/MWSCAS.2009.5235943. - m
Matt Venn

11/15/2022, 4:26 PM**@Matt Venn**has left the channel - a
Art Scott

02/19/2023, 3:38 PMN. Jeanniot, G. Pillonnet, P. Nouet, N. Azemard and A. Todri-Sanial, "Synchronised 4-Phase Resonant Power Clock Supply for Energy Efficient Adiabatic Logic,"*2017 IEEE International Conference on Rebooting Computing (ICRC)*, Washington, DC, USA, 2017, pp. 1-6, doi: 10.1109/ICRC.2017.8123661.**Abstract:**Adiabatic logic is an alternative architecture design style to reduce the power consumption of digital cores by using AC power supply instead of DC ones. The energy saving of the digital gates is strongly related to the efficiency of adiabatic AC power supplies. In this paper, we propose a resonant reversible power-clock supply design with four different phases. The resonance deviation between the four power-clock supplies is synchronized thanks to 12 control signals (3 controls signals per power-clock supply). We derive the energy dissipation of a 4-stage PFAL pipeline circuit supplied with the proposed resonant powerclock supply, which can dissipate up to 2.9 times less energy than a non-adiabatic CMOS pipeline.**Published in:**2017 IEEE International Conference on Rebooting Computing (ICRC) Posted in #adiabatonauts - a
Art Scott

02/19/2023, 3:38 PMY. Takahashi, N. Anuar, S. -y. Nagano, T. Sekine and M. Yokoyama, "On chip LC resonator circuit using an active inductor for adiabatic logic,"*2009 52nd IEEE International Midwest Symposium on Circuits and Systems*, Cancun, Mexico, 2009, pp. 1171-1174, doi: 10.1109/MWSCAS.2009.5235943.**Abstract:**In this paper, we propose a LC resonator circuit using Hara's active inductor for adiabatic logic. The proposed circuit consists of four MOS-transistors Colpitts oscillator and an active inductor. This circuit require no inductor and can be produced two-phase sinusoidal clocking. From the simulation results, we show that the proposed circuit was operated as a 10 MHz, 3 V peak-to-peak LC resonant oscillator. Posted in #adiabatonauts - a
Art Scott

02/19/2023, 3:39 PMD. Maksimovic, V. G. Oklobdzija, B. Nikolic and K. W. Current, "Clocked CMOS adiabatic logic with integrated single-phase power-clock supply," in*IEEE Transactions on Very Large Scale Integration (VLSI) Systems*, vol. 8, no. 4, pp. 460-463, Aug. 2000, doi: 10.1109/92.863629. Abstract: The design and experimental evaluation of a clocked adiabatic logic (GAL) is described in this paper. CAL is a dual-rail logic that operates from a single-phase AC power-clock supply. This new low-energy logic makes it possible to integrate all power control circuitry on the chip, resulting in better system efficiency, lower cost, and simpler power distribution. CAL can also be operated from a DC power supply in a nonenergy-recovery mode compatible with standard CMOS logic. In the adiabatic mode, the power-clock supply waveform is generated using an on-chip switching transistor and a small external inductor between the chip and a low-voltage DC supply. Circuit operation and performance are evaluated using a chain of inverters realized in a 1.2 /spl mu/m CMOS technology. Experimental results show that energy savings are achieved at clock frequencies up to about 40 MHz as compared to the nonadiabatic mode. Since CAL can operate both in adiabatic and nonadiabatic modes, power management strategies may be based upon switching between modes when necessary. URL: https://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=863629&isnumber=18706 Posted in #adiabatonauts - a
Art Scott

02/19/2023, 9:58 PM - a
Art Scott

02/19/2023, 10:23 PMScreen Shot 2023-01-15 at 7.57.48 AM.png - a
Art Scott

02/20/2023, 2:40 PM"THE STUDY OF CMOS BASED VCO WITH ACTIVE INDUCTOR ...." https://rucore.libraries.rutgers.edu/rutgers-lib/38728/PDF/1/play/. "A New Active Inductor and Its Application to Wide Tuning Range LC ...." https://citeseerx.ist.psu.edu/document?repid=rep1&type=pdf&doi=771cd4b7d1c06167d11b0b7f6befe268581 - a
Art Scott

06/10/2023, 12:52 PM# ChatGPT prompt: Write a pyspice AC tank ladder oscillator # for adiabatic computational circuitry that will run in google colab # and produce a plot of the oscillator output !apt-get install -y libngspice0-dev !pip install PySpice import matplotlib.pyplot as plt import numpy as np from PySpice.Spice.Netlist import Circuit from PySpice.Unit import * # Create a new circuit circuit = Circuit('LC Oscillator') # Define the ladder network parameters n = 5 # number of stages L_value = 1@u_mH C_value = 1@u_uF # Add the ladder network to the circuit for i in range(n): circuit.L(i+1, 'n{}'.format(i), 'n{}'.format(i+1), L_value) circuit.C(i+1, 'n{}'.format(i+1), circuit.gnd, C_value) # Add a sinusoidal voltage source as input circuit.SinusoidalVoltageSource(0, 'n0', circuit.gnd, amplitude=1@u_V) # Perform an AC analysis simulator = circuit.simulator(temperature=25, nominal_temperature=25) analysis = simulator.ac(start_frequency=1@u_Hz, stop_frequency=1@u_GHz, number_of_points=500, variation='dec') # Plot the output plt.figure(figsize=(10, 6)) plt.title("LC Oscillator Output") plt.plot(np.log10(analysis.frequency), np.abs(analysis['n5'])) plt.xlabel('Log Frequency [Hz]') plt.ylabel('Voltage [V]') plt.grid() plt.show() - a
Art Scott

09/09/2023, 11:31 PMHence, the tank circuits *510*A, *520*A, *530*A, *540*A, *550*A, *560*A illustrated in FIG. *5*areby using a single, fixed inductor *510*D, *520*D, *530*D, *540*D, *550*D, *560*D for all tank circuits *510*A, *520*A, *530*A, *540*A, *550*A, *560*A and variable, tuning capacitors *510*C, *520*C, *530*C, *540*C, *550*C, *560*C with different values tuned for each corresponding tank circuit *510*A, *520*A, *530*A, *540*A, *550*A, *560*A. https://patents.google.com/patent/US11671054B2/en?oq=google+patents+oscillator+for+adiabatic+computational+circuitry+%22(us11671054)%22**easily built with readily available components**