Kennedy Caisley
06/01/2022, 12:16 PMXiaolin Wu
06/02/2022, 2:42 AMVijayan Krishnan
06/02/2022, 12:57 PM[STEP 27]
[INFO]: Running Magic Spice Export from LEF...
[ERROR]: There are illegal overlaps (e.g., routes over obstructions) in your design.
[ERROR]: See /openlane/designs/axi_dma_wrapper/runs/RUN_2022.06.02_12.36.52/logs/signoff/27-ext2spice.feedback.txt for more.
27-ext2spice.feedback.txt
box 235198 340496 236125 340592
feedback add "Illegal overlap between obsm1 and metal1 (types do not connect)" medium
box 235198 339952 236125 340048
feedback add "Illegal overlap between obsm1 and metal1 (types do not connect)" medium
box 235198 339408 236125 339504
feedback add "Illegal overlap between obsm1 and metal1 (types do not connect)" medium
box 236123 340496 237525 340592
Any suggestion how to fix it or shall I file github issue. Thanks in advanceXiaolin Wu
06/02/2022, 7:31 PMJianwei Jia
06/03/2022, 2:44 AMXiaolin Wu
06/03/2022, 7:51 PMaquiles viza
06/03/2022, 10:25 PMRyan R
06/04/2022, 3:31 PMTom
06/05/2022, 7:07 PMRaymond Yang
06/06/2022, 1:08 PMAbhinav Uppal
06/07/2022, 12:44 AMext2spice short resistor
during extraction). The ext files do have four ports:
timestamp 1644511149
version 8.3
tech sky130A
style ngspice()
scale 1000 1 500000
resistclasses 4400000 2200000 <tel:9500003050000|950000 3050000> 120000 197000 114000 191000 120000 197000 114000 191000 48200 <tel:3198002000000|319800 2000000> 48200 48200 12800 125 125 47 47 29 5
parameters sky130_fd_pr__nfet_01v8 l=l w=w a1=as p1=ps a2=ad p2=pd
parameters sky130_fd_pr__pfet_01v8_hvt l=l w=w a1=as p1=ps a2=ad p2=pd
port "VPWR" 4 0 496 368 592 m1
port "VPWR" 4 29 527 63 561 m1
port "VGND" 1 0 -48 368 48 m1
port "VGND" 1 29 -17 63 17 m1
port "VPB" 3 29 527 63 561 nw
port "VNB" 2 29 -17 63 17 pw
node "decap_4" 0 0 0 0 comment 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
node "VPWR" 0 0 29 527 m1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
node "VGND" 0 0 29 -17 m1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
node "VPB" 0 0 29 527 nw 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
substrate "VNB" 0 0 29 -17 pw 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
device msubckt sky130_fd_pr__nfet_01v8 79 47 80 48 l=210 w=110 "VNB" "VPWR" 420 0 "VGND" 220 0 "VGND" 0 0
device msubckt sky130_fd_pr__pfet_01v8_hvt 79 323 80 324 l=210 w=174 "VPB" "VGND" 420 0 "VPWR" 348 0 "VPWR" 0 0
But the ext2spice
output drops them on the spice file (I see two port instances like XFILLER_39_233 vssd1 vccd1 sky130_fd_sc_hd__decap_4
)...is there another command to be used besides ext2spice
? @Tim EdwardsTom
06/07/2022, 3:04 AM% select save vg
Can't rename cell '__SELECT__' to 'vg' because that cell already exists.
File for cell __SELECT__: [hit return to abort save] ?
Cell not saved.
Luke Sammarone
06/07/2022, 10:22 AMTim Edwards
06/07/2022, 1:06 PMRaymond Yang
06/08/2022, 12:21 PMRyan R
06/08/2022, 7:02 PMTim Edwards
06/08/2022, 7:05 PMgds flatten true
which automatically flattens trivially simple cells (cells with < 10 shapes in them), or by the gds flatglob <string>
where you can give it a glob-style matching string, if there is a syntactical commonality in the names of the cells you want to flatten (like the $
in the middle of the name).Jianwei Jia
06/08/2022, 10:19 PMMatt Venn
06/09/2022, 12:12 PMloading history file ... 5 events added
error in slave eval:
couldn't load file "/usr/local/lib/magic/tcl/tclmagic.so": /usr/local/lib/magic/tcl/tclmagic.so: cannot open shared object file: No such file or directory
Main console display active (Tcl8.6.10 / Tk8.6.10)
(magic-inverter) 6 %
Raymond Yang
06/09/2022, 8:42 PMXingyu Ni
06/09/2022, 9:09 PMgds write
command to write a layout with pwell into gds format. Then we used gds read
to look at the layout and found the pwell disappear. How can we solve this issue? Thanks!Luke Sammarone
06/10/2022, 7:40 AMJake Ke
06/10/2022, 8:43 AM2022-06-09 19:42:23 - [INFO] - {{STEP UPDATE}} Executing Check 7 of 13: Magic DRC
2022-06-09 20:02:36 - [WARNING] - Error generating DRC violation report(s), the full set of Magic DRC reports will not be generated. local variable 'layer' referenced before assignment
2022-06-09 20:02:36 - [ERROR] - Violation Message "Can't overlap those layers "found 1 Times.
2022-06-09 20:02:36 - [ERROR] - 1 DRC violations
2022-06-09 20:02:36 - [WARNING] - {{MAGIC DRC CHECK FAILED}} The GDS file, user_project_wrapper.gds, has DRC violations.
...
2022-06-09 20:52:43 - [CRITICAL] - {{FAILURE}} 2 Check(s) Failed: ['Documentation', 'Klayout FEOL'] !!!
magic_drc_check.drc.report
has the following:
user_project_wrapper
----------------------------------------
Can't overlap those layers
----------------------------------------
675.370 2645.385 678.390 2645.390
----------------------------------------
[INFO]: COUNT: 1
[INFO]: Should be divided by 3 or 4
1. Could you help me understand the error in magic? Which layers are overlapped? A screenshot is attached.
2. Do you know why is the DRC error not marked as failed by precheck?Tim Edwards
06/10/2022, 1:22 PMRaymond Yang
06/11/2022, 12:17 AMcif see CONT
in Magic to see how the mcon squares would be cut, but in Magic, the contacts are all square with 0.17um by 0.17um. How could I fix this step as the wrapper gds that Klayout is checking has 0.175um by 0.17um mcons? ThanksLuke Sammarone
06/11/2022, 1:03 AMPepijn de Vos
06/17/2022, 1:58 PMPepijn de Vos
06/17/2022, 2:10 PMgencell sky13::sky130_fd_pr__nfet_01v8
but then... the arguments? Can't figure it out. It tells me wrong # args: should be "dict create ?key value ...?"
whatever I tryPepijn de Vos
06/17/2022, 2:13 PMgencell thecell thename key value key value
the questions marks are some... regex/tcl convention?Pepijn de Vos
06/17/2022, 2:14 PM