I put together the visualizations that I mentioned earlier into a fully packaged setup that can be used to very quickly run them on your own designs (currently it only runs on a single block at a time, so the design blocks would have to be individually simulated outside of caravel), I'd love for people to try it out on their own designs! (Please DM me or file a GitHub issue if there are any problems that pop up). It should be very easy to install - all that is needed is OpenLANE, the SKY130 PDK, Python 3, and a handful of python packages) https://github.com/asinghani/openlane-chip-vis

I'm doing another interview, this time with @User about their PLL design. If you have any questions you'd like to ask, just DM me or put in a thread here.

yes, a couple: first, how easy would it be to adapt to other geometries

the second: are there any plans to add a built-in clock divider / generator

so as to be able to do multiple clock frequencies for things like low-power mobile processors?

that cannot be done externally because it messes with clock trees and timing.

Hello everyone, I was following the quick installation guide of openlane. https://github.com/efabless/openlane#quick-start But after exporting pdk_root and make openlane I'm getting a permission denied error. Here is the complete error log: https://pastebin.pl/view/4729164c I had checked the docker installation using this command "sudo docker run hello-world" this works without error.

https://reposhub.com/python/miscellaneous/efabless-openlane.html Should I follow this installation, this looks different than what mention in openlane readme.

Thanks @User for the opportunity to interview you about your PLL design!

FYI, if you make ASICs you likely also need to test them at one point. I am currently working on a test setup for a (non-Sky130) test tape-out I did mid last year. You can find first blurb on my blog.

@User Is this something that the eezbench power supply could do?

@User No AFAIK. This is a single quadrant device, e.g. can only source current, not sink current. On the website they have 4-quadrant power on the roadmap but not in the works yet AFAICS.

In this interview with @TimEdwards we talk about what happens between submitting #ASIC files to eFabless and them sending them on to Skywater. It's like making sausages - you don't want to know!

@User Very interesting.

And yeah, the (minimal) possibility that we might have to regenerate from reason X or Y is the reason why at this moment, I'm not touching my sky130 setup, I want to keep it exactly as it was when I generated the files 😅

V cool! Will each project be contacted when doing the final verification checks or should we only be expect to be contacted if there's some problem with the design?

@User: We'll be posting updates once in a while. Unless something crops up, we likely won't contact you directly, although there may be additional automated reponses from the submission system (I'm not very familiar with that code). Currently we are doing some back-and-forth with SkyWater to verify the fill generation scripts, and spot-checking some projects to make sure the fill generation and compositing are working, and fixing bugs where they're not. SkyWater is back in operation after the holidays, and everything is moving forward.

Hello Everyone Your only chance for (paid) 5-days Physical Design workshop + (free) 8-week analog IP design internship with OpenLANE/Sky130. Look below link for more details. https://www.vlsisystemdesign.com/advanced-physical-design-using-openlane-sky130/ We generally don't guarantee placements, but (latest news) our past students who have done the above workshop+internship have taped-out analog PLL chip, while most of them have got calls from top VLSI companies, while some of them got placed or got MS/internship opportunities. So grab this rare opportunity, complete the workshop+internship, get noticed and increase your chances of placements/tape-outs/MS All the best and happy learning #VLSI #vlsidesign #semiconductor #OpenSource #asics #physicaldesign #pd #sta #statictiminganalysis

Sorry sent here by Mistake

It really takes immense amount of focus and creativity to think of multiple parameters altogether and design state-of-the-art VLSI analog IP, which you will be proud of for your entire career. Read more about the opportunity here. Especially, freshers and people looking for serious, respectable career in VLSI https://www.vlsisystemdesign.com/what-is-ip-design-internship-ever-visited-pizza-hut/

TIL that Micro Magic (micromagic.com) SUE EDA tools have been open sourced: https://sourceforge.net/projects/mmi-pd This is the tool they used to make a 5 GHz RISC-V.

@User I tried to rebuild the MMI tools, but the tar.gz file has some include files that are symlinks to non existent directories. I can't run the pre-built binaries as these are for 32 bit linux. I had already fixed lot of things in the Makefiles and in the .c sources, but missing files are a showstopper :-(

The Research Scholar Program aims to support early-career professors who are pursuing research in fields relevant to Google.

Opps wrong thing to paste

Ready for Challenge!! Just 24hrs Until OpenLANE/Sky130 workshop + (free) internship Selected participants will have a chance to undergo VSD 8-week Research IP design internship for FREE. Below link has workshop details: https://www.vlsisystemdesign.com/advanced-physical-design-using-openlane-sky130/ Let me answer couple of commonly asked questions about Workshop + Internship: 1) Internships will be given to participants who complete Workshop with a valid git link. It will start from 1st Feb and go on till end of March 2) Workshop - You need to spend at-least 5-6hrs per day 3) Internship - You need to spend max 6-7hrs per day 4) You should be able to do it parallely with your existing commitments, and You will be overloaded. That's how VLSI and Semiconductor industry is 5) If you complete the 8-week Internship, the end is really satisfying. Ask our previous interns So if you are mentally prepared to take up the challenge, then only join Workshop

@User how much are interns being compensated for their investment of 6-7hrs per day? Also, W2 or 1099?

@User that's a bummer. Registration is closed now (it's still the 20th here) and I was never able to sign up as your payment system didn't work. I have exchanged many messages with your support and was waiting for a reply

Hello everyone, @User really thank you for the hackaday remoticon workshop. After solving so much error I was able to load seven-segment-seconds example into magic, will try a few of my designs next. In the original video, there is actually some hackaday banner/animation cover that is overlapping some part of the terminal so If anyone wants unedited video: