Also, I would be curious to know which block you would be interested in the most

@User many thanks. I am interested in the ldo and adpll. Have you worked on this approach. This is not really open source or. My student commented about needing Synopsis tools Now, I see that you are an author too.

Welcome! yes, you still need commercial tools for some parts of the flow. We are currently working on a fully open source flow.

That would be indeed great. But in these synthesizable designs, how can one check/simulate the performance and/or consider the place and route impacts

We run post PEX simulations to check the results like for any other analog blocks except it is automated.

For Analog blocks I agree. But if it is a big block such as ADPLL i believe it will be a huge netlist to simulate.

correct. for the adpll we have a specific flow to verify it. (DCO + functional simulation et...)

Where can I read more about it. Functional simulation is with high level behavioral modeling or with spice or with hdl simulation. Sorry for many questions. I think i opened a can of worms 😄

no, it is okay. I don't think it is a can of worm since PLL aren't simple to simulate. We have a specific flow for it and I will check if there is anything that blocks us from putting on github if it isn't already

Thats great. I have made Analog PLLs. For that too, we use combination of phase domain modelling, behavioral modeling and complete spice finally. It's a lengthy process. I am kinda cm curious hence, how it is for digital designs like adpll and dldo.

In addition, for a synthesizable PLL i came to know that automated PnR could result in phase imbalances knowledge of which and subsequent calibration hence would be necessity.

Do you have any references/papers. It would interested to look at your work as well.

Not really, Its only one year I have started with PLLs. But for the above mentioned approaches I can provide some references if it is of interest. So far I have designed a basic LC VCO based PLLs. From this year onwards I have some Interns working on ADPLL

<!channel> btw, we added some features in openroad (not released yet) to support some of the features required by FASoC:

Still working on placement but should be done soon.

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Hi everyone! @User and I have been working on OpenFASOC a fully open source analog block generation based on FASOC (https://github.com/idea-fasoc/fasoc) using fully open-source tools like OpenROAD, Magic and Netgen. So far, we have pushed an automated temperature sensor generator to github: https://github.com/idea-fasoc/OpenFASOC. Please have a look and try our generator and let us know if there are any issues. We would be happy to assist. Thanks!

Hi! We have updated our spice simulation flow and added a partial + full verification modes. We have done so because of the slow runtime of ngspice. I would be really grateful if people could help us improve it. Any inputs or PRs are welcome! https://github.com/idea-fasoc/OpenFASOC

What is the repo location for the MPW caraval_fasoc? git@gitlab.com:msaligane/caravel_fasoc is not available...

@User https://skywater-pdk.slack.com/archives/C016HUV935L/p1618254013091800?thread_ts=1617537556.037600&amp;cid=C016HUV935L You need to update this path to point to open_pdks: https://github.com/idea-fasoc/OpenFASOC/blob/main/common/platform_config.json

Where i can download this file ? google/open_pdks/pdks/sky130A/libs.tech/ngspice/sky130.lib.spice

hello, I was trying to build the OpenFASOC but i get this error when I try to run the make sky130_temp. I have the lib.ref folder in the correct location but it doesnt seem to recognise the path to it

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Hi Everyone, Thanks to Nathan for the invite here. It's a pleasure! I'm part of Voler Systems, we work on all sorts of engineering design and device development across the board from IoT to Wearable Tech or Medical Devices to Industrial Tech projects. If there's any potential project in where our talented engineers can assist on, feel welcome to reach out. We're able to do firmware, software, FPGA dev, and sensor technology engineering as well. I'm Bryan from Voler Systems. Here's our website 😄 https://www.volersystems.com/

Hi there, can anyone tell if its just me who isn't able to run this temperature sensor notebook design on openfasoc's github...ig it is throwing some dependency errors. https://github.com/idea-fasoc/OpenFASOC @mehdi any suggestions on this??

Hello everyone As, I am working on the openfasoc flow so, I have a doubt can anyone please tell me that what's the process of openfasoc flow for any new design ? As, I am unable to understand that how openfasoc flow will generate the analog part for any new design . Can anyone please help me ?

As , I have tried by doing some changes in the makefile,python file and the json file and in config.mk file also, and also done some changes in the make file of flow And after done some of the changes in these files according to my design specs and when I tried for executing then it's showing this error

Can anyone please tell me how to resolve this error ?