Radheshyam Sharma
08/25/2022, 12:39 PMUday Hasan
08/21/2022, 5:22 PMmul32
following the tutorial I was trying to run the flow for a basic verilog adder, getting the following issue:
Can anyone please help?
I tried changing the PL_TARGET_DENSITY to 0.59 and 0.60
a different issue arises then.
I also tried changing the CORE_HEIGHT
Sorry, can't figure out what I'm missing...
[STEP 7]
[INFO]: Running Global Placement (log: designs/adder/runs/run_1/logs/placement/7-global.log)...
[ERROR]: during executing openroad script /openlane/scripts/openroad/gpl.tcl
[ERROR]: Log: designs/adder/runs/run_1/logs/placement/7-global.log
[ERROR]: Last 10 lines:
[InitialPlace] Iter: 1 CG residual: 0.00000010 HPWL: 1856040
[InitialPlace] Iter: 2 CG residual: 0.00000011 HPWL: 1570893
[InitialPlace] Iter: 3 CG residual: 0.00000008 HPWL: 1567242
[InitialPlace] Iter: 4 CG residual: 0.00000010 HPWL: 1570893 [InitialPlace] Iter: 5 CG residual: 0.00000004 HPWL: 1567566
[ERROR GPL-0302] Use a higher -density or re-floorplan with a larger core area.
Given target density: 0.55
Suggested target density: 0.59
Error: gpl.tcl, 89 GPL-0302
child process exited abnormally
[ERROR]: Creating issue reproducible...
[INFO]: Saving runtime environment...
OpenLane TCL Issue Packager
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Parsing config file(s)…
Setting up /openlane/designs/adder/runs/run_1/issue_reproducible…
Found $::env(GPL_CELL_PADDING)…
.
.
. Found $::env(STA_PRE_CTS)… Done. [INFO]: Reproducible packaged: Please tarball and upload 'designs/adder/runs/run_1/issue_reproducible' if you're going to submit an issue. [INFO]: Saving current set of views in 'designs/adder/runs/run_1/results/final'... [INFO]: Generating final set of reports... [INFO]: Created manufacturability report at 'designs/adder/runs/run_1/reports/manufacturability.rpt'. [INFO]: Created metrics report at 'designs/adder/runs/run_1/reports/metrics.csv'. [INFO]: Saving runtime environment... [ERROR]: Flow failed. [INFO]: The failure may have been because of the following warnings: [WARNING]: Current core area is too small for a power grid. The power grid will be minimized. while executing "flow_fail" (procedure "run_tcl_script" line 89) invoked from within "run_tcl_script -tool openroad -no_consume {*}$args" (procedure "run_openroad_script" line 2) invoked from within "run_openroad_script $::env(SCRIPTS_DIR)/openroad/gpl.tcl -indexed_log $log" (procedure "global_placement_or" line 15) invoked from within "global_placement_or" (procedure "run_placement" line 16) invoked from within "run_placement" (procedure "run_placement_step" line 8) invoked from within "[lindex $step_exe 0] [lindex $step_exe 1] " (procedure "run_non_interactive_mode" line 52) invoked from within "run_non_interactive_mode {*}$argv" invoked from within "if { [info exists flags_map(-interactive)] || [info exists flags_map(-it)] } { if { [info exists arg_values(-file)] } { run_file [file nor..." (file "./flow.tcl" line 401)
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08/26/2022, 9:23 AMArman Avetisyan
08/29/2022, 9:03 AMSlackbot
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11/20/2022, 12:01 PMDaniel Mateos Romero
11/20/2022, 4:20 PMSlackbot
11/24/2022, 11:26 AMThomas Pluck
12/17/2022, 7:20 PMSud_ana
12/30/2022, 1:13 PMopenlane
on the example user_proj_mul32 from the tutorial.
1. I've cloned the caravel_user_repo
and exported the OPENLANE_ROOT
and PDK_ROOT
environment variables.
2. I've copied the config files into the openlane folder. The config files are now in json
format instead of tcl.
Could someone please assist with following errors:
1. pdk folder is empty (image attached). When is it expected to be populated and how to do so ? ( I had no issues in hardening only the macro spm32 as the pdks were built into OpenLane/pdk but I didn't see any corresponding step for the integration into caravel: IMAGE ATTACHED)
2. The config file I see is a json file
with the same variables as the tcl file.
So I've edited the json file but I get an error wile running openlane using make user_proj_mul32
. How do I get-around it?Sud_ana
12/30/2022, 1:15 PMSud_ana
12/30/2022, 1:45 PMvolare: command not found
. Is it the reason the pdk
directory is empty ?Sud_ana
12/31/2022, 1:46 PMMonitor: Timeout, Test Mega-Project WB Port (RTL) Failed
message in the DV step running make verify-wb_spm-rtl
. Could you kindly advise how to address it?donn
02/19/2023, 5:31 PMSlackbot
05/17/2023, 7:00 PMSlackbot
08/15/2023, 12:43 PMMohammed Fayiz Ferosh
10/23/2023, 2:04 AM