Weston Braun
05/05/2021, 11:55 PMWeston Braun
05/05/2021, 11:55 PMWeston Braun
05/06/2021, 12:03 AMWeston Braun
05/06/2021, 12:19 AMVern
05/06/2021, 12:23 AM** Regression Sim
.param vdd_val=3.3
.param temp_val=27
.param cnr_val="tt"
.option temp=temp_val
.lib '/usr/share/pdk/sky130A/libs.tech/ngspice/sky130.lib.spice' cnr_val
V_VDD VDD GND DC vdd_val
*** Rest of circuit here...
.CONTROL
save @M.*[*]
foreach vdd_loop 2.97 3.3 3.63
foreach temp_loop -40 27 130
foreach cnr_loop "tt" "ss" "ff"
alterparam vdd_val = $vdd_loop
alterparam temp_val = $temp_loop
alterparam cnr_val = $cnr_loop
op
print @M.*[*]
end $ foreach cnr_loop
end $ foreach temp_loop
end $ foreach vdd_loop
.endc
.end
Now, that alterparam
stuff could be very wrong; I haven't really tried it yet. I fear there might be some setting of curplot
involved. But, that's the gist of what what I'm looking to do, with the example showing the simple case of oppoint corners.stefanoaz
05/06/2021, 12:24 AMWeston Braun
05/06/2021, 12:25 AMAmro Tork
05/06/2021, 8:34 AMAmro Tork
05/06/2021, 8:35 AMAmro Tork
05/06/2021, 8:35 AMAmro Tork
05/06/2021, 8:35 AMAmro Tork
05/06/2021, 8:37 AMAmro Tork
05/06/2021, 8:37 AMAmro Tork
05/06/2021, 12:35 PMBoris Murmann
05/06/2021, 4:34 PMVern
05/07/2021, 11:51 AMalterparam XDUT.XMNDIO w=5.5
...
reset
but I keep getting the following message:
Error: parameter 'w' not found,
command 'alterparam' skipped
That message suggests to me that ngspice was able to follow my path to the transistor subcircuit instance, but for whatever reason, it can't find the transistor's "w" parameter from there.
Now, I checked to be sure and, yes, the FET subcircuit models do call the width parameter "w". Every parameter has the expected name, except, perhaps, for "M" being replaced with "mult".
I mention the lower level of hierarchy because I found some threads from 2018 on ngspice's Sourceforge page about alterparam that seemed to suggest that, at least at the time, ngspice could not do alterparam
on subcircuits below the top level. Anyone know if that is still true?yrrapt
05/07/2021, 12:55 PMJohn Kustin
05/07/2021, 5:05 PMTim Edwards
05/07/2021, 5:22 PMTim Edwards
05/07/2021, 5:23 PMJohn Kustin
05/07/2021, 5:55 PMJohn Kustin
05/07/2021, 10:19 PMWeston Braun
05/08/2021, 5:15 AMextract all
ext2sim labels on
ext2sim
extresist tolerance 10
extresist
ext2spice lvs
ext2spice cthresh 0.01
ext2spice extresist on
ext2spice
Weston Braun
05/08/2021, 5:30 AMext2spice -o foo.spice
I am guessing I want to have the bare ext2spice command and then a second command to write the netlist to a file?Weston Braun
05/08/2021, 5:43 AMX0 vss.t54 m1_n4941_3600.t20 m1_n6489_502.t23 vss sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=0u l=0u
yrrapt
05/08/2021, 8:31 AMWeston Braun
05/08/2021, 8:32 AMyrrapt
05/08/2021, 8:43 AMyrrapt
05/08/2021, 8:44 AM"gds flatten true
gds read ../../amsat_txrx_ic.gds
load $1
#flatten drc_cell_lvs
#load drc_cell_lvs
extract all
extract do all
ext2spice lvs
ext2spice subcircuits off
ext2spice -o drc_cell_lvs.spice
select top cell
port makeall
ext2spice lvs
ext2spice cthresh 0.01
ext2spice rthresh 0.01
ext2spice subcircuit on
ext2spice ngspice
ext2spice -o drc_cell_pex.spice"
yrrapt
05/08/2021, 8:44 AM